7473 Flip Flop JK with Clear

74LS73 This integrated contains two Flip Flop JK with Clear that operate with a falling edge and deliver complementary outputs. Flip-flop J-K dual with LS technology with Clear and two independent J-K flip-flops With single J-K, clock and direct entries from Clear. The LS73A contains two negative flip-flops inegative-edge-triggered flip-flops. The J and K inputs must be stable at the setup time before the high to low clock transition for predictable operation. When the CLEAR is low, it cancels the clock and the data inputs force the low Q output and the Q\ high output.

Specs

• Family: LS
• Flip-flop type: JK
• Trigger Type: Negative Edge
• Output Type: Differential / Complementary
• Propagation Delay: 15 ns
• Frequency: 30 MHz
• Minimum supply voltage: 4.75 V
• Maximum supply voltage: 5.25 V
• Output current: 8mA
• Minimum operating temperature: 0 ° C
• Maximum operating temperature: 70 ° C
• Encapsulated: Dip